zet.aluzina.org

Hi, is it possible to use the current c source codes of cpu descriptions on virtual machine like programs to convert the code from c to vhdl/verilog and ease the processor development process? In example, there is a wiki like: http://en.wikipedia.org/wiki/C_to_HDL
Can this help in any way?
Regards
AAP

I don't think that could help very much. First of all because sequential code is very difficult to paralelize. I guess is going to generate very bloated code. Verilog code in Zet is quite optimized to fit into the Cyclone II device.

Anyway, it might be worthy to give it a try, at least to see how it works...